AUTHORS

Dr. Milos D. Ercegovac is a Professor in the Computer Science Department, School of Engineering and Applied Science at the University of California, Los Angeles. He earned his BS in electrical engineering ('65) from the University of Belgrade, Yugoslavia, and MS ('72) and PhD ('75) in computer science from the University of Illinois, Urbana-Champaign. Dr. Ercegovac specializes in research and teaching in digital arithmetic, digital design, and computer system architecture. His recent research is in the areas of arithmetic design for low power and for field programmable gate arrays (FPGAs). His research contributions have been extensively published in journals and conference proceedings. He is a coauthor of two textbooks on digital design and of a monograph in the area of digital arithmetic. Dr. Ercegovac has been involved in organizing the IEEE Symposia on Computer Arithmetic. He served as an editor of the IEEE Transactions on Computers and of the Journal of Parallel and Distributed Computing. Dr. Ercegovac is a member of the ACM and the IEEE Computer Society.

Dr. Tomas Lang is a Professor in the Department of Electrical and Computer Engineering at the University of California, Irvine. Previously he was a Professor in the Computer Architecture Department of the Polytechnic University of Catalonia, Spain, and a faculty member of the Computer Science Department at the University of California, Los Angeles. He received an Electrical Engineering degree from the Universidad de Chile in 1965, a M.S from the University of California (Berkeley) in 1966 and the Ph.D. from Stanford University in 1974. Dr. Lang's primary research and teaching interests are in digital design and computer architecture with current emphasis on high-speed and low-power numerical processors and multiprocessors. He is coauthor of two textbooks on digital systems, two research monographs, one IEEE Tutorial, and author or coauthor of research contributions to scholarly publications and technical conferences.

Dr. Jaime H. Moreno is manager of the Computer Architecture and Analysis group at the IBM Thomas J. Watson Research Center. He received an electrical engineering degree from the University of Concepcion, Chile, in 1979, and M.S. and Ph.D. degrees in computer science from the University of California Los Angeles in 1985 and 1989, respectively. In 1992 Dr. Moreno joined the IBM Research Division, where he has been performing research on processor architectures. Before joining IBM, he was a faculty member at the Department of Electrical Engineering, University of Concepcion, Chile, and collaborated as a postdoctoral researcher at UCLA. Dr. Moreno is co-author of the book "Matrix Computations on Systolic-Type Arrays," Kluwer Academic Publishers, 1992. He holds four patents on processor related inventions, and is author/co-author of various publications in the field. His research interests include processor architectures, instruction-level parallelism, application-specific and embedded systems, and simulation environments for the exploration of processor architectures. He is a member of the IEEE and the IEEE Computer Society.