D.
M. Harris, J. E. Stine, M. D. Ercegovac, A.
Nannarelli, K. Parry, C. Turek:
"Unified
Digit Selection for Radix-4 Recurrence Division and
Square Root. " IEEE Trans. Computers 73(1): 292-300,
2024.
M.
Usman, M. D. Ercegovac, J-A Lee:
"Low-Latency
Online Multiplier with Reduced Activities and
Minimized Interconnect for Inner Product Arrays. "
J. Signal Process. Syst. 95(7): 777-796, 2023.
T.
Arifeen, S. Gorgin, M. Gholamrezaei, A.Hassan, M. D.
Ercegovac, J-A Lee:
"Low
Latency and High Throughput Pipelined Online Adder
for Streaming Inner Product."
J. Signal Process. Syst. 95(7): 815-829, 2023.
A.
Wanna, S. Coward, T. Drane, G. Constantinides,
M. Ercegovac, "Multiplier Optimization via
E-Graph Rewriting",
Proc.57h
Asilomar Conference on Signals, Systems and
Computers, 2023.
S.
Gorgin, M. Najafi, M. Golamrezaei, J-A Lee, M.
D. Ercegovac, "MSDF-SVM: Advantage of Most
Significant Digit First Arithmetic for SVM
Realization", Proc.57h Asilomar Conference on
Signals, Systems and Computers, 2023.
S.
Gorgi, M. Golamrezaei, J-A Lee,
Mi. D. Ercegovac,
"An Efficient Dot-Product Unit Based on
Online Arithmetic for Variable Precision
Applications", Proc.57h Asilomar Conference on
Signals, Systems and Computers, 2023.
M.Usman,
J-A Lee and M. D.Ercegovac, "Multiplier with Reduced
Activities and Minimized Interconnect for Inner
Product Arrays", Proc.55th Asilomar Conference
on Signals, Systems and Computers, 2021.
T.
Arifeen, A. S.Hassan, J-A Lee, and M. D. Ercegovac,
"Adder with Reduced Latency and Minimized
Interconnect for Streaming Inner Products",
Proc.55th Asilomar Conference on Signals, Systems
and Computers, 2021.
M.
D. Ercegovac, "On Reducing Module Activities in
Online Arithmetic Operations", Proc.54th Asilomar
Conference on Signals, Systems and Computers, 2020.
J.
E. Stine, M. D. Ercegovac and J-M. Muller , "An
Architecture for Improving Variable Radix Real
and
Complex Division Using Recurrence Division",
Proc.54th Asilomar Conference on Signals, Systems
and Computers, 2020.
Talks
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