CS259: NanoSystems

READING LIST

Basic Elements

Memristor

• Saro 11/22 : D.B. Strukov, G.S. Snider, D.R. Stewart, R.S. Williams, The missing memristor found, Nature

Doped nanocrystals

• DJ Norris, AL Efros, SC Erwin Doped nanocrystals, Science, 2008
• S.C. Erwin, L. Zu, M.I. Haftel, A.L. Efros, T.A. Kennedy, D.J. Norris Doping semiconductor nanocrystals, Nature, 2005

Processing Elements

Quantum Dots

• Jagruti 11/3 : A.P. Alivisatos, Semiconductor clusters, nanocrystals, and quantum dots, Science, 1996.

Nanocell logic

• J.M. Tour, W.L. Van Zandt, C.P. Husband, Nanocell logic gates for molecular computing, IEEE Trans. on Nanotechnology, 2002.
• Nikhilesh 10/27 : M.R. Stan, P.D. Franzon, S.C. Goldstein, J.C. Lach, M.M. Ziegler, Molecular electronics: From devices and interconnect to circuits and architecture. Proceedings of the IEEE, Vol. 91, No. 11, pp. 1940-1957, 2005.

Interconnect

Photonic Crystals-based Interconnect

• R.G. Beausoleil, P.J. Kuekes, G.S. Snider, Nanoelectronic and nanophotonic interconnect, Proceedings of the IEEE
• D. Miller, Device Requirements for Optical Interconnects to Silicon Chips
• Ohashi, K. Nishi, K. Shimizu, T. Nakada, M. Fujikata, J. Ushida, J. Torii, S. Nose, K. Mizuno, M. Yukawa, H. Kinoshita, M. Suzuki, N. Gomyo, A. Ishi, T. Okamoto, D. Furue, K. Ueno, T. Tsuchizawa, T. Watanabe, T. Yamada, K. Itabashi, S.-i. Akedo, J., On-Chip Optical Interconnect, Proceedings of IEEE Page(s): 1186 - 1198

Plasmonics

• Tarun 11/1 : E. Ozbay, Plasmonics: merging photonics and electronics at nanoscale dimensions, Science, 2006
• Siddharth 10/18 : S.A. Maier, M.L. Brongersma, P.G. Kik, S. Meltzer, A.A.G. Requicha, H.A. Atwater, Plasmonics-A route to nanoscale optical devices, Advanced Materials, 2001
• K.F. MacDonald, Z.L. Sámson, M.I. Stockman, Ultrafast active plasmonics, Nature Photonics, 2008
• A.L. Pyayt, B. Wiley, Y. Xia, A. Chen, L. Dalton, Integration of photonic and silver nanowire plasmonic waveguides, Nature nanotechnology, 2008

3D

• Alen 10/13 : K. Bernstein, P. Andry, J. Cann, P. Emma, Interconnects in the third dimension: design challenges for 3D ICs, Proceedings of the ACM IEEE DAC
• K. Sakuma, P.S. Andry, C.K. Tsang, 3D chip-stacking technology with through-silicon vias and low-volume lead-free interconnections, IBM Journal of Research
• S. Gupta, M. Hilbert, S. Hong, R. Patti, Techniques for producing 3D ICs with high-density interconnect, VLSI Multilevel Interconnection

Nanowires

• Manu 10/25 : G.S. Snider, R.S. Williams, Nano/CMOS architectures using a field-programmable nanowire interconnect, Nanotechnology, 2007
• W. Lu, C.M. Lieber, Nanoelectronics from the bottom up, Nature Materials, 2007

RF

• Nishanth 10/13 : M.F. Chang, V.P. Roychowdhury, L. Zhang, RF/wireless interconnect for inter-and intra-chip communications, Proceedings of the IEEE
• M.F. Chang, J. Cong, A. Kaplan, M. Naik, CMP network-on-chip overlaid with multi-band RF-interconnect, HPCA 2008

Nanotube radio

• K. Jensen, J. Weldon, H. Garcia, A. Zettl, Nanotube radio, Nano Lett, 2007 - ACS Publications
• H.A. Zambrano, J.H. Walther, R.L. Jaffe, Thermally driven molecular linear motors: A molecular dynamics study, The Journal of chemical physics, 2009

Classical High Performance Interconnect

• Maria 10/13 : R.H. Havemann, J.A. Hutchby, High-performance interconnects: An integration overview, Proceedings of the IEEE, 2001
• Modhavi 11/17 : V. Raghunathan, M.B. Srivastava, R.K. Gupta, A survey of techniques for energy efficient on-chip communication, DAC2003
• P.P. Pande, C. Grecu, M. Jones, Performance evaluation and design trade-offs for network-on-chip interconnect architectures, IEEE Transactions on Computers, 2005
• Survey of Network-on-chip Proposals
• T. Bjerregaard, S. Mahadevan, A survey of research and practices of network-on-chip, ACM Computing Surveys (CSUR)
• K. Maex, M.R. Baklanov, D. Shamiryan, F. Iacopi, Low dielectric constant materials for microelectronics, Journal of Applied Materials

Surveys

• Archana 11/15 : P.P. Pande, A. Ganguly, B. Belzer, Novel interconnect infrastructures for massive multicore chips—an overview, Circuits and Systems

Memory

Race track

• S.S.P. Parkin, M. Hayashi, L. Thomas, Magnetic domain-wall racetrack memory, Science, 2008

Phase-change Memories

• Hui 11/3 : M. Wuttig, N. Yamada, Phase-change materials for rewriteable data storage, Nature materials, 2007
• Kannan 11/1 : M.H.R. Lankhorst, B.W. Ketelaars, R.A.M. Wolters, Low-cost and nanoscale non-volatile memory concept for future silicon chips, Nature materials, 2005

Nano mass transport Memories

• Yu-Ting 10/20 : G.E. Begtrup, W. Gannett, T.D. Yuzvinsky, V.H. Crespi, Nanoscale reversible mass transport for archival memory, Nano letters, 2009

Nanoionics

• R. Waser, M. Aono, Nanoionics-based resistive switching memories, Nature Materials, 2007

Millipede

• James 10/25 : P. Vettiger, G. Cross, M. Despont, U. Drechsler, The" millipede"- nanotechnology entering data storage, IEEE Transactions on Nanotechnology, 2002

Various

• G. Muller, T. Happ, M. Kund, G.Y. Lee, N. Nagel, R. Sezi, Status and outlook of emerging nonvolatile memory technologies, IEDM 2004

Nanosensors

• M. Bruchez Jr, M. Moronne, P. Gin, S. Weiss, A.P. Alivisatos, Semiconductor nanocrystals as fluorescent biological labels, Science, 1998
• W.C.W. Chan, S. Nie, Quantum dot bioconjugates for ultrasensitive nonisotopic detection, Science, 1998
• X. Michalet, F.F. Pinaud, L.A. Bentolila, J.M. Tsay, S. Doose, J.J. Li, G. Sundaresan, A.M. Wu, S.S. Gambhir, and S.Weiss, Quantum dots for live cells, in vivo imaging, and diagnostics, Science, 2005

IC Aging

• M. Alam, Reliability-and process-variation aware design of integrated circuits, Microelectronics Reliability, 2008
• M. Agarwal, B.C. Paul, M. Zhang, S. Mitra, Circuit Failure Prediction and Its Application to Transistor Aging, Proceedings of the 25th IEEE VLSI Test Symmposium, p.277-286, May 06-10, 2007
• Andrew 10/20 : S.V. Kumar, C.H. Kim, S.S. Sapatnekar, An analytical model for negative bias temperature instability, Proceedings of the IEEE ICCAD, pp. 493-498, 2006
• Beayna 10/18 : W. Wang, S. Yang, S. Bhardwaj, R. Vattikonda, S. Vrudhula, F. Liu, Y. Cao, The impact of NBTI on the performance of combinational and sequential circuits, Proceedings of the 44th annual conference on Design automation, 2007
• W. Wang, Z. Wei, S. Yang, Y. Cao, An efficient method to identify critical gates under circuit aging, Proceedings of the 2007 IEEE/ACM ICCAD, 2007
• Y. Lu , L. Shang , H. Zhou , H. Zhu , F. Yang , X. Zeng, Statistical reliability analysis under process variation and aging effects, Proceedings of the 46th Annual Design Automation Conference, 2009
• M. Basoglu, M. Orshansky, M. Erez, NBTI-aware DVFS: a new approach to saving energy and increasing processor lifetime, ISLPED, Pages: 253-258, 2010
• M. Agarwal, V. Balakrishnan, A. Bhuyan, Kyunglok Kim, B.C. Paul, W. Wang, B. Yang, Y. Cao, S. Mitra, Optimized circuit failure prediction for aging: Practicality and Promise, ITC 2008