Sihao Liu
I am a 4th-year (@2022/12) PhD candidate at PolyArch Research Group
of
UCLA Computer Science,
where I work on Computer Architecture, specifically Domain-specific Accelerators (DSAs), RISC-V related topics,
FPGA prototype and VLSI technology.
Aside from academia, I am an amateur swimmer and currently on track to challenge myself with a goal of 10km
freestyle in open water (currently 7.6km @ 3.2hr @ 2022.03).
My name sounds like "See-How". It is 思皓 in Chinese, which means "think brightly" 😃.
Before joinging UCLA, I received my Bachelor's degree of Electrical Engineering from Xi'an Jiaotong University
in 2019
and spent a few months in Lausanne (Switzerland, 2017) and California (2016, 2018) as summer student.
For those students who are looking for PTE of PIC 10A/B @ UCLA, please contact Siting Liu via siting6math@gmail.com.
I am NOT the correct "S. Liu" you saw on your MyUCLA :)
E-mail
Business: [first name] -at- cs.ucla.edu
Personal: [last name] -at- [first name].me
Google Scholar  / 
LinkedIn  / 
GitHub  / 
DBLP  / 
ORCID
Research Experiences
My research focuses primarily on the Automated Generation of Domain-Specific Accelerators (DSAs) as cited from
our group website below:
Domain-specific hardware accelerators are extremely efficient, but require extensive manual effort in hardware
and software stack development.
Automated ASIC generation (eg. HLS) can be insufficient, because the hardware becomes inflexible.
An ideal accelerator generation framework would be automatable, enable deep specialization to the domain, and
maintain a uniform programming interface.
Our insight is that many prior accelerator architectures can be approximated by composing a small number of
hardware primitives, specifically those from spatial architectures.
With careful design, a compiler can
understand how to use available
primitives,
with modular and composable transformations,
to take advantage of the features of a given program.
I joined UCLA since 2018 summer via UCLA-CSST (a Summer Undergraduate Research Program).
Since then, I have been working on hardware implementation and prototype for two Domain-specific Accelerators:
SPU
(MICRO 2019) and
REVEL
(HPCA 2020). After that, I
started working on
DSAGEN
(ISCA 2020) project where DSAs
can be synthesized in a software-friendly way.
As a follow-up study of the SPU, we proposed
PolyGraph
(ISCA 2021)
that is specialized for the task granularity, where I implemented the key components in hardware.
Our latest research,
OverGen
(MICRO 2022),
integrates the sparsity and density characteristics of SPU and REVEL,
adopts the "synthesis" idea of DSAGEN, and proposes a comprehensive generation framework
to complete the full stack support from programming languages (C, C++) to FPGA prototyping.
My research track (with representitive projects) can be summarized as below.
Besides projects mentioned above, I was in part of several other projects mostly for hardware implementations
and prototype:
µIR
(MICRO 2019),
DAEGEN
(Computer
Architecture Letters 2019),
Near-stream Computing
(HPCA 2022)
Publications
Conference Papers:
- OverGen: Improving FPGA Usability through Domain-specific Overlay
Generation
Sihao Liu*, Jian Weng*, Dylan Kupsh, Atefeh Sohrabizadeh, Zhengrong Wang,
Licheng Guo, Jiuyang Liu, Maxim Zhulin, Rishabh Mani, Lucheng Zhang, Jason Cong, Tony Nowatzki
MICRO 2022 | *co-first author
| paper
| code
| slide
| tutorial
| news
Best Paper Runner-up Award
- Near-Stream Computing: General and Transparent Near-Cache
Acceleration
Zhengrong Wang, Jian Weng, Sihao Liu, Tony Nowatzki
HPCA 2022 |
paper
- PolyGraph: Exposing the Value of Flexibility for Graph Processing
Accelerators
Vidushi Dadu, Sihao Liu, Tony Nowatzki
ISCA 2021 |
paper |
video |
pptx
IEEE Micro Top Picks 2022 for Novelty and Long-term Impact
- DSAGEN: Synthesizing Programmable Spatial Accelerators
Jian Weng*, Sihao Liu*, Vidushi Dadu, Zhengrong Wang, Preyas Shah, Tony
Nowatzki
ISCA 2020 | *co-first author |
paper |
slide |
pptx
IEEE Micro Top Picks 2021 as Honorable Mention
- A Hybrid Systolic-Dataflow Architecture for Inductive Matrix
Algorithms
Jian Weng, Sihao Liu, Zhengrong Wang, Vidushi Dadu, Tony Nowatzki
HPCA 2020 |
paper |
slide |
pptx
- Towards General Purpose Acceleration by Exploiting Common Data-Dependence
Forms
Vidushi Dadu, Jian Weng, Sihao Liu, Tony Nowatzki
MICRO 2019 |
paper |
slide |
pptx
IEEE Micro Top Picks 2020 for Novelty and Long-term Impact
- µIR -An intermediate representation for transforming and optimizing the
microarchitecture of
application accelerators
Amirali Sharifian, Reza Hojabr, Navid Rahimi, Sihao Liu, Apala Guha, Tony Nowatzki,
Arrvindh Shriraman
MICRO 2019 |
paper
Journal Papers:
- Unifying Spatial Accelerator Compilation with Idiomatic and Modular
Transformations
Jian Weng, Sihao Liu, Dylan Kupsh, Tony Nowatzki
2022 IEEE Micro Special Issue on Compiling for Accelerators |
paper
- Systematically Understanding Graph Accelerator Dimensions and the Value of
Hardware
Flexibility.
Vidushi Dadu, Sihao Liu, Tony Nowatzki.
2022 IEEE Micro Top Picks in Computer Architecture |
paper
- Towards General-Purpose Acceleration: Finding Structure in
Irregularity
Vidushi Dadu, Jian Weng, Sihao Liu, Tony Nowatzki
2020 IEEE Micro Top Picks in Computer Architecture |
paper
- DAEGEN: A Modular Compiler for Exploring Decoupled Spatial
Accelerators
Jian Weng, Sihao Liu, Vidushi Dadu, Tony Nowatzki
2019 Computer Architecture Letters |
paper
Non-CS Undergraduate Papers:
- Unsupervised Analysis of EEG Signals Reveals Common Personality Traits
During an Iterated
Ultimatum Game
Qinyue Zheng, Sihao Liu, Alessandro EP Villa, Alessandra Lintas
2019 International Conference on Computer Networks and Inventive Communication Technologies |
paper
- In vivo monitoring of microwave ablation in a porcine model using
ultrasonic differential
attenuation coefficient intercept imaging.
Siyuan Zhang, Ranxiang Xu, Shaoqiang Shang, Yuqiang Han, Sihao Liu, Tianqi Xu, Chunming Gu,
Xingguang Zhu, Gang Niu, Mingxi Wan
2018 International Journal of Hyperthermia |
paper
- Ex Vivo and In Vivo Monitoring and Characterization of Thermal Lesions by
High-Intensity Focused
Ultrasound and Microwave Ablation Using Ultrasonic Nakagami Imaging
Siyuan Zhang, Shaoqiang Shang, Yuqiang Han, Chunming Gu, Shan Wu, Sihao Liu, Gang Niu,
Ayache Bouakaz, Mingxi Wan
2018 IEEE Transactions on Medical Imaging |
paper
- Monitoring of microwave ablation in porcine liver using ultrasonic Nakagami
imaging
Siyuan Zhang, Shaoqiang Shang, Yuqiang Han, Ranxiang Xu, Sihao Liu, Lei Zhang, Shan Wu,
Gang Niu, Sanhong Wang, Mingxi Wan
2017 IEEE International Ultrasonics Symposium |
paper
Talks & Tutorials
[10/2022, MICRO'55]
A Full-Stack End-to-End Framework for Domain-Specific Accelerator Generation.
[website]
[06/2022, CDSC'22]
OverGen: Improving FPGA Usability through Domain-specific Overlay Generation.
[slide]
[06/2022, CDSC'22]
OverGen: A Multi-core SoC Implementation for Domain-specific Overlay Generation.
[poster]
[04/2021, LATTE'21]
Generality is the Key Dimension in Accelerator Design.
[discussion]
[pdf]
[video]
[10/2020, MICRO'20]
DSAGEN: Democratizing Decoupled Spatial Architecture Research.
[page]
[tool]
[02/2020, CDSC'20]
Programmable Accelerator Synthesis.
[slide]
Awards & Honors
2022, IEEE MICRO Best Paper
Runner-up Award,
News
2021, IEEE MICRO Top Picks
from Computer Architecture Conferences
2020, IEEE MICRO Top Picks
from Computer Architecture Conferences Honerable Mention
2019, IEEE MICRO Top Picks
from Computer Architecture Conferences
2019, Dean's Fellowship Award
2019, UCLA University Fellowship
2017, Finalist, Interdisciplinary Contest in Modeling, Certificate
2017, First Prize, China Big Data Modeling Contest, News Report in Chinese
2016, National Scholarship
Calendar
Please check my available time below.
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I am mostly in LA and Bay Area, sometimes in New York 😃
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Calendar, all credits go to there
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